Student Projects

Vision Transformers (ViTs) demonstrate exceptional performance in computer vision but suffer from large parameter counts and quadratic computational complexity, $\mathcal{O}\left(N^2\right)$, severely limiting their deployment on resource-constrained edge hardware. While recursive weight-sharing reduces parameter counts and token merging mitigates computational and memory bottlenecks, integrating these two paradigms without costly retraining is non-trivial, leaving this intersection largely unexplored. We propose a post-training multi-axis compression approach that successfully combines the recursive weight-sharing of the Sliced Recursive Transformer (SReT) with the dynamic token merging algorithm of Token Merging (ToMe). By implementing an Unmerge tracking stack, enforcing strict mathematical merging bounds, and applying parallel spatial tracking, our methodology resolves the spatial and merging constraints of the integration. Furthermore, we utilise an exponential token reduction schedule to stabilise the semantic densification inherent to recursive loops. Benchmarked on ImageNet-1K, our optimised configuration achieves a 27.6% increase in throughput and a 38.5% reduction in Peak Activation Memory (PAM) with a minimal 1.47% accuracy drop on a GPU at a batch size of 128. However, the algorithmic overhead negated the performance gains at a batch size of 1. Nevertheless, this approach establishes the feasibility of dynamic token reduction within recursive ViT architectures, providing a structural baseline for future edge-targeted optimisations.

Token-merging settings that work well on one processor or workload may perform poorly on another. This project develops automated design-space exploration for choosing MergeOver schedules against hardware-specific objectives such as latency, memory use, throughput, and accuracy, producing reproducible deployment-aware configurations.

Fixed token-merging schedules apply the same compression to every input despite differences in redundancy and difficulty. This project extends MergeOver with a lightweight runtime policy that selects merge rates from intermediate model signals, aiming to improve the compute-accuracy trade-off without excessive decision overhead.

Token merging reduces computation but can discard spatial information when merged features are restored. This project investigates spatially aware reconstruction for MergeOver using position, similarity, neighbourhood, or merge-assignment information, balancing accuracy and inference cost without retraining the underlying model.

The High-Luminosity Large Hadron Collider (HL-LHC) will significantly increase data processing requirements for tasks such as particle tracking. Transformer-based models have recently shown promising results for track reconstruction, but running such models in hardware environments relevant to high-energy physics is far from straightforward. Strict latency constraints, limited on-chip memory, and integration into existing systems all have to be considered.

This thesis explores how a Transformer-based tracking model can be deployed on an FPGA platform under realistic resource and accuracy constraints. Instead of aiming for a full end-to-end implementation, the focus is placed on accelerating a representative Transformer encoder layer and studying the practical trade-offs that arise in hardware. An FPGA accelerator prototype is developed using high-level synthesis, with particular attention to on-chip weight storage, memory organization, and various hardware optimizations.

Beyond the hardware design itself, this work also addresses the practical challenge that deploying machine learning models on FPGAs typically requires expertise in both deep learning and hardware design. To lower this barrier, a semi-automated workflow is developed that enables selective offloading Transformer model parts to the FPGA, while the remaining parts of the model execute on a general-purpose processor. The goal is not only to build an accelerator, but also to make experimentation with FPGA-based acceleration more accessible to researchers without extensive hardware experience.

Experimental results show that the design is largely memory-bound, with on-chip memory usage forming the main bottleneck. Multi-layer implementations improve throughput and energy efficiency, but the achieved latency remains higher than that of modern GPU solutions. Overall, the results demonstrate that selective acceleration of Transformer components on FPGA hardware is feasible and provide a practical, reproducible workflow that helps bridge the gap between machine learning models and FPGA deployment in a high-energy physics context.

Partitioning a Transformer model across FPGA resources may reduce latency, but communication and buffering costs can erase the benefit. This project develops a reproducible workflow for selecting boundaries, synthesising components, and benchmarking end-to-end deployment, identifying when partitioning improves latency within resource and quality constraints.

Transformer models reuse a small set of operations, yet FPGA implementations often remain application-specific. This project develops a catalogue of parameterised, synthesisable hardware blocks with consistent interfaces and composition support, measuring how block granularity and configurability affect reuse, synthesis effort, and hardware quality.

Industrial CPS measurements often need to be analysed continuously rather than after a complete trace becomes available. This project builds a runtime stream-processing pipeline for phase- or window-level fault predictions under bounded memory and latency, covering ingestion, state management, disordered data, and end-to-end performance.

Repeatable monitoring experiments need more varied and controllable traces than scarce postmortem data can provide. This project develops a generative source for normal and anomalous industrial CPS sequences, validating whether its replayable streams preserve temporal, multivariate, and fault-related properties without memorising training data.

Industrial CPS traces arrive continuously and may be irregular or variable in length, while machine-learning models expect stable inputs. This project develops a causal preprocessing layer that compares fixed, adaptive, and knowledge-informed windowing and representation strategies under bounded memory and prediction-latency requirements.

A single fault model may not suit every phase, signal set, context length, or data-quality condition. This project develops a modular inference service that routes incoming windows to specialised models or an ensemble using observable runtime characteristics, comparing detection quality, latency, and routing stability with general and static alternatives.

Segmentation choices determine what information reaches a machine-learning model. This project adapts InfoPos to the NASA Milling Wear data set and constructs matched data at different operational-knowledge positions, testing whether knowledge-informed phases improve wear detection or estimation while controlling leakage and operating conditions.

Neural networks have become increasingly complex, driving the need for efficient execution. This need is particularly pronounced in environments where computational resources are limited and the size of the models poses a challenge to traditional execution methods. One way to address this is through model parallelism where we partition a model over multiple devices. This thesis presents a method for enhancing model parallelism in existing neural neural network architectures, specifically focusing on the Inception-ResNet-v2 model. Our method consist of 3 transformations: placing sequential cells in parallel (ParallelResNet), replacing regular convolutions with grouped convolutions (GroupedResNet), and splitting operators along the channel dimension (SplitResNet). We analyze our proposed transformations on the Inception-ResNet-v2 model and show that they introduce a straightforward way to partition the model that minimizes communication overhead and creates partitions of equal computation complexity. We conclude that the classification accuracy is reduced for ParallelResNet, and increases for GroupedResNet. SplitResNet is either unaffected or reduced depending on the dataset. However, overall the effect of the transformations on classification accuracy is very small and further evaluation on more complex classification problems is necessary to quantify it.

Neural architectures differ in how effectively they learn from limited data, but Neural Architecture Search usually optimises final accuracy or computational cost. This project makes data efficiency an explicit search objective and tests whether low-cost candidate rankings remain reliable after fuller training and under changed resource constraints.

Continuous data streams often exceed storage and processing budgets, while indiscriminate reduction can discard rare or safety-relevant cases. This project develops a bounded online distillation policy that represents normal behaviour while protecting corner cases, evaluating retention, distributional fidelity, runtime cost, and downstream model quality.

This project develops a research orchestrator for frugal model-parallel inference across pools of resource-constrained networked platforms. A controller and dedicated node clients estimate partitions and placements, coordinate deployment, and collect detailed telemetry to measure and reduce per-node resource waste while meeting inference requirements.

REDVID provides configurable reduced simulation, but richer experiments require coherent support for events, geometry, magnetic effects, pile-up, and reproducibility. This project selects and integrates a justified subset of these extensions behind reusable interfaces, validating correctness and performance without pursuing full detector realism.

Timing information can turn spatial tracking into a four-dimensional experiment, but it requires clear reduced-order semantics. This project extends REDVID with reproducible particle, event, and hit times, then measures the computational overhead and tests whether timing improves a bounded tracking or hit-association task.

Reduced simulations become more useful when complexity can be varied in controlled and reproducible ways. This project extends REDVID with named recipes spanning track types, detector structure, interaction effects, and scalable storage, showing how individual complexity dimensions affect generated data, performance, and a representative ML task.

Electron behaviour is difficult to represent efficiently because material interaction, energy loss, deflection, and secondary activity are coupled. This project adds a configurable reduced-order electron model to REDVID and identifies the minimum mechanisms needed for useful electron-specific data, balancing reproducibility, utility, and cost.

Muon trajectories differ through penetration, magnetic curvature, material interaction, energy change, and possible decay. This project develops a configurable reduced-order muon model for REDVID using a justified subset of these mechanisms, then assesses its analytical validity, computational cost, and value for tracking or identification.

REDVID performance depends on workload size, configuration, enabled simulation features, and execution mode. This project builds a reproducible benchmark suite for latency, throughput, memory, output volume, and scaling, attributing costs to major components and producing practical guidance for simulation configuration and optimisation.

In recent years, serverless computing has emerged as a transformative paradigm for building and deploying applications without the burden of managing traditional server infrastructure. Concurrently, edge computing has gained traction as a critical solution to reduce latency and enhance real-time data processing by bringing computation closer to data sources. However, while integrating these two powerful concepts – serverless and edge computing – has historically posed challenges, recent advancements have showcased the feasibility of running serverless platforms within edge environments. This paper introduces Knative Edge, a novel serverless platform that seamlessly orchestrates the deployment of serverless functions across both edge devices and cloud environments. Knative Edge leverages the unique characteristics of edge computing, such as proximity to data and reduced network latency, while harnessing the scalability and flexibility of serverless computing. By combining these two paradigms, Knative Edge empowers developers to build highly responsive and efficient applications that span the cloud-edge continuum. We present the architectural design, key components, and deployment workflow of Knative Edge, and provide experimental results showcasing its performance benefits. Our results demonstrate that Knative Edge can make efficient use of both cloud and edge resources by dynamically offloading function executing from the edge to the cloud periods of high activity, while reducing the overall application latency and increasing request throughput compared to an edge-only deployment.

In recent years, Serverless computing has emerged as a persuasive paradigm aiming to reshape the cloud computing landscape considerably. Serverless offers a scalable and cost-effective deployment model where users can run applications without the need to manage or provision servers. The underlying infrastructure is entirely abstracted and has the ability to scale automatically in a flexible manner, while the users are charged exclusively for the resources they use. In parallel, we have witnessed a surge in the adoption of Artificial Intelligence and Machine Learning (ML) technologies in various application domains. Since Serverless architectures are not tailored to address the unique challenges posed by resource-intensive jobs, combining ML with Serverless proves to be a complex undertaking.

In this thesis, we propose a solution for deploying ML models on Serverless platforms, specifically for inference jobs. Our model-agnostic approach is based on a flexible decomposition of such models into sub- models, referred to as slices, and the execution of inferences in a workflow of Serverless functions. We rely on conducting a thorough investigation of the limitations affecting the most popular Serverless platforms on the market and devising strategies to overcome them. Our experimental evaluations are performed on AWS, considering the ONNX open source format for ML model representation. Our results show that our decomposition method enables running ML inference on Serverless, regardless of the model size, benefiting from the high scalability of this architecture while lowering the strain on computing resources such as required runtime memory.