Thesis

Automated Transformer Deployment on FPGA for Particle Tracking

Arjan Blankestijn

Abstract

The High-Luminosity Large Hadron Collider (HL-LHC) will significantly increase data processing requirements for tasks such as particle tracking. Transformer-based models have recently shown promising results for track reconstruction, but running such models in hardware environments relevant to high-energy physics is far from straightforward. Strict latency constraints, limited on-chip memory, and integration into existing systems all have to be considered.

This thesis explores how a Transformer-based tracking model can be deployed on an FPGA platform under realistic resource and accuracy constraints. Instead of aiming for a full end-to-end implementation, the focus is placed on accelerating a representative Transformer encoder layer and studying the practical trade-offs that arise in hardware. An FPGA accelerator prototype is developed using high-level synthesis, with particular attention to on-chip weight storage, memory organization, and various hardware optimizations.

Beyond the hardware design itself, this work also addresses the practical challenge that deploying machine learning models on FPGAs typically requires expertise in both deep learning and hardware design. To lower this barrier, a semi-automated workflow is developed that enables selective offloading Transformer model parts to the FPGA, while the remaining parts of the model execute on a general-purpose processor. The goal is not only to build an accelerator, but also to make experimentation with FPGA-based acceleration more accessible to researchers without extensive hardware experience.

Experimental results show that the design is largely memory-bound, with on-chip memory usage forming the main bottleneck. Multi-layer implementations improve throughput and energy efficiency, but the achieved latency remains higher than that of modern GPU solutions. Overall, the results demonstrate that selective acceleration of Transformer components on FPGA hardware is feasible and provide a practical, reproducible workflow that helps bridge the gap between machine learning models and FPGA deployment in a high-energy physics context.

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Metadata

Type:
Thesis
Year:
2026
Level:
Master
Institution:
University of Twente

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Licence

Copyright in this thesis is held by the author. Reuse requires permission from the author, unless permitted by law or an applicable licence.